... and solved.

And solved quickly, at that.

I was on a huge roll, and very into the lingo style language. IT's very similar to VHDL, which I;m using on and off while working.

What's VHDL?

VHDL.

It's a language for creating circuits of transistors rather than instructions for a processor to follow.

Effectively, every statement that you write runs in parallel with all the others. You can force things to be somewhat sequential though, by adding a clock and watching for it's rising edge (if(rising_edge(clk)) then ...end if) and then adding state machines to separate which parallel statements happen during that clock.
(This also makes signalling and communication between parts of the program somewhat tricky, as you need to know the exact number of clock cycles between receiving an acknowledge, and when a message of data is going to start flowing)

It's really, really fast (every statement runs every single clock) depending on how fast your clock is, and how fast your electronics are (We're using FPGA's at around 80 - 90 MHz or so, which is friggen insanity). VHDL is very good at bit bashing/it's built for it, and not great at traditional math. There are things like floating point cores, which can calculate a division in a single clock(or 2 or 4 or 8 or something) but they take up most of the transistors on you chip. It's better to add a soft uController which can do the math for you.



tl;dr: VHDL is one step closer to hardware than assembly language.